• Corpus ID: 14573557

Design of Low Power & High Speed Comparator with 0.18µm Technology for ADC Application

@inproceedings{Mongre2014DesignOL,
  title={Design of Low Power \& High Speed Comparator with 0.18µm Technology for ADC Application},
  author={Rohit Mongre and R. C. Gurjar},
  year={2014}
}
In Analog to Digital Converter (ADC), high speed comparator influences the overall performance of ADC directly. This paper presents the high speed & low power design of a CMOS comparator. Schematic design of this comparator is fabricated in a 0.18µm UMC Technology with 1.8V power supply and simulated in cadence Virtuoso. Simulation results are presented and it shows that this design can work under high speed of 0.8108 GHz. The design has a low offset voltage, low power dissipation 108.0318µw… 

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