Design and test of a highthroughput cabac encoder

@article{Lo2007DesignAT,
  title={Design and test of a highthroughput cabac encoder},
  author={Chia-Cheng Lo and Ying-Jhong Zeng and Ming-Der Shieh},
  journal={TENCON 2007 - 2007 IEEE Region 10 Conference},
  year={2007},
  pages={1-4}
}
The inherent data dependency and various types of syntax elements existing in the CABAC encoding process will result in dramatically increased complexity if two bins obtained from binarizing syntax elements are handled per clock cycle. By analyzing the distribution of binarized bins in different video sequences, we show how to efficiently improve the encoding rate with a limited increase in hardware complexity by only allowing a certain type of syntax elements to be processed two bins at a time… CONTINUE READING

References

Publications referenced by this paper.
SHOWING 1-9 OF 9 REFERENCES

Arithmetic coding architecture for H.264/AVC CABAC compression system

  • Euromicro Symposium on Digital System Design, 2004. DSD 2004.
  • 2004
VIEW 4 EXCERPTS
HIGHLY INFLUENTIAL

A high performance CABAC encoder

  • The 3rd International IEEE-NEWCAS Conference, 2005.
  • 2005
VIEW 2 EXCERPTS

A new architecture for fast arithmetic coding in H.264 advanced video coder

  • 8th Euromicro Conference on Digital System Design (DSD'05)
  • 2005
VIEW 2 EXCERPTS

An overview of H.264/MPEG-4 Part 10

  • Proceedings EC-VIP-MC 2003. 4th EURASIP Conference focused on Video/Image Processing and Multimedia Communications (IEEE Cat. No.03EX667)
  • 2003
VIEW 1 EXCERPT

Efficient BIST TPG design and test set compaction via input reduction

  • IEEE Trans. on CAD of Integrated Circuits and Systems
  • 1998
VIEW 2 EXCERPTS

Testing a motion estimator array

  • [1990] Proceedings of the International Conference on Application Specific Array Processors
  • 1990
VIEW 1 EXCERPT