This paper proposes a packaged transistor modeling using lumped elements. This model allows studying the input impedance dispersion when a range of variation is applied to various package components. This dispersion is also highlighted when a load impedance variation is applied to the package transistor. It is demonstrated that this dispersion can be corrected using a specific input pre-matching and by having a very good information about input return loss contours. Moreover, this specific packaged transistor presents input impedance close to 50Ω over [3.0-3.8]GHz.