Design and implementation of a queue manager for IP switches with massive ports

Abstract

In shared memory switch fabrics, cell-copy or address-copy is used to realize multicast or broadcast in the existing queue managers and address-copy will occupy less on-chip memory and so is widely used. When there are a large number of physical ports in the switch, the number of pointer buffers will increase accordingly, which makes it difficult to meet the design requirements in the case where storage resource is limited. To address this issue, an Address Transfer Queue (ATQ) is added in the queue manager to store multicast or broadcast packet pointers and all the queues share one pointer memory, which will reduce the on-chip pointer memory requirements greatly. To solve the problem of pointer contention between each queues, an index queue is introduced into the queue manager. The whole design is implemented in a Xilinx's xc6vlx130t FPGA, the utilization of hardware resource is listed and comparison with normal queue manager shows that 81% of the block RAM can be saved for an 8 ports switch.

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Cite this paper

@article{Wang2015DesignAI, title={Design and implementation of a queue manager for IP switches with massive ports}, author={Jing Wang and Lufeng Qiao and Qinghua Chen and Zhen Zheng and Jian Yang}, journal={2015 8th International Congress on Image and Signal Processing (CISP)}, year={2015}, pages={1541-1545} }