Design and implementation of DDA architecture for FIR Filters

Abstract

Traditionally, direct implementation of a K-tap FIR filter requires K multiply-and-accumulate (MAC) blocks, which are expensive to implement in FPGA due to logic complexity and resource usage. To resolve this issue, we first present DA, which is a architecture without multiplier. This paper implements the DA architecture. This architecture is applicable to… (More)

Topics

3 Figures and Tables