Design and characterization of parallel prefix adders using FPGAs

@article{Hoe2011DesignAC,
  title={Design and characterization of parallel prefix adders using FPGAs},
  author={David H. K. Hoe and Chris D. Martinez and Sri Jyothsna Vundavalli},
  journal={2011 IEEE 43rd Southeastern Symposium on System Theory},
  year={2011},
  pages={168-172}
}
Parallel-prefix adders (also known as carry-tree adders) are known to have the best performance in VLSI designs. However, this performance advantage does not translate directly into FPGA implementations due to constraints on logic block configurations and routing overhead. This paper investigates three types of carry-tree adders (the Kogge-Stone, sparse Kogge-Stone, and spanning tree adder) and compares them to the simple Ripple Carry Adder (RCA) and Carry Skip Adder (CSA). These designs of… CONTINUE READING

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