Corpus ID: 212510018

Design and Implementation of low power Dickson Charge Pump in 0.18μm CMOS Process

@inproceedings{Kailuke2013DesignAI,
  title={Design and Implementation of low power Dickson Charge Pump in 0.18μm CMOS Process},
  author={A. Kailuke and P. Agrawal and R. Kshirsagar},
  year={2013}
}
Charge pump circuits are used to obtaining higher voltages than normal power supply voltages in low voltage Phase Lock Loop (PLL), flash Memories & DRAM’s. New integrated Dickson Charge pump design with charge transfer switches (CTS’s) is optimized and compared including the losses due to devices parasitic is described. Results show that the CTS based Dickson charge pump is the best structure for integration. Therefore, techniques to improve performance and conversion efficiency of integrated… CONTINUE READING
2 Citations

Figures from this paper

A Novel Method to Design Power Converter for Energy Harvesting System
  • 1

References

SHOWING 1-10 OF 11 REFERENCES
A high-efficiency CMOS voltage doubler
  • 413
A low power cross-coupled charge pump with charge recycling scheme
  • 13
MOS charge pumps for low-voltage operation
  • 372
  • Highly Influential
  • PDF
On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique
  • 1,291
An on-chip high-voltage generator circuit for EEPROMs with a power supply voltage below 2 V
  • 68
A 5-V-only operation 0.6- mu m flash EEPROM with row decoder scheme in triple-well structure
  • 136
A switched capacitor double voltage generator
  • J. Silva-Martínez
  • Computer Science
  • Proceedings of 1994 37th Midwest Symposium on Circuits and Systems
  • 1994
  • 23
  • PDF
A 1-V 24-GHz 17.5-mW Phase-Locked Loop in a 0.18-um CMOS Process
  • 34
Method and apparatus for a two phase bootstrap charge pump
  • U.S. Patent 5 432 469, July 1995.
  • 1995
Production of high velocity positive ions
  • Proc. Roy. Soc., A, vol. 136, pp. 619-630, 1932
  • 1932