Design and Implementation of a Secure RISC-V Microprocessor

  title={Design and Implementation of a Secure RISC-V Microprocessor},
  author={Kleber Stangherlin and Manoj Sachdev},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  • K. StangherlinM. Sachdev
  • Published 10 May 2022
  • Computer Science
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Secret keys can be extracted from the power consumption or electromagnetic emanations of unprotected devices. Traditional countermeasures have a limited scope of protection and impose several restrictions on how sensitive data must be manipulated. We demonstrate a bit-serial RISC-V microprocessor implementation with no plain-text data. All values are protected using Boolean masking. Software can run with little to no countermeasures, reducing code size and performance overheads. Unlike previous… 

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