Corpus ID: 15249542

Design and Implementation of Low Power 4:1 Multiplexer using Adiabatic Logic

@inproceedings{Hooda2013DesignAI,
  title={Design and Implementation of Low Power 4:1 Multiplexer using Adiabatic Logic},
  author={J. Hooda and S. Chawla},
  year={2013}
}
  • J. Hooda, S. Chawla
  • Published 2013
  • Mathematics
  • The main and highly concerned issue in the low power VLSI design circuits is Power dissipation. The basic approaches that we used for reducing energy/power dissipation in conventional CMOS circuits include reducing the supply voltages, on decreasing node capacitances and minimize the switching activities with efficient charge recovery logic. The Adiabatic switching technique based upon the energy recovery principle is one of the techniques which is widely used to achieve low power VLSI design… CONTINUE READING
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