Design and Calibration of a 12-Bit Current-Steering DAC Using Data-Interleaving
@inproceedings{Jankunas2014DesignAC,
title={Design and Calibration of a 12-Bit Current-Steering DAC Using Data-Interleaving},
author={Benjamin Jankunas},
year={2014}
}i ABSTRACT High speed current-steering DACs with high linearity are needed in today's applications such as wired and wireless communications, instrumentation, radar, and other direct digital synthesis (DDS) applications. However, a trade-off exists between the speed and resolution of Nyquist rate current-steering DACs. As the resolution increases, more transistor area is required to meet matching requirements for optimal linearity and thus, the overall speed of the DAC is limited. In this…
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One Citation
Machine Learning Based Image Calibration for a Twofold Time-Interleaved High Speed DAC
- Computer Science2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)
- 2019
A novel image calibration algorithm for a twofold time-interleaved DAC (TIDAC) based on simulated annealing, which is often used in the field of machine learning to solve derivative-free optimization (DFO) problems.
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