• Corpus ID: 7536870

Design and Calibration of a 12-Bit Current-Steering DAC Using Data-Interleaving

@inproceedings{Jankunas2014DesignAC,
  title={Design and Calibration of a 12-Bit Current-Steering DAC Using Data-Interleaving},
  author={Benjamin Jankunas},
  year={2014}
}
i ABSTRACT High speed current-steering DACs with high linearity are needed in today's applications such as wired and wireless communications, instrumentation, radar, and other direct digital synthesis (DDS) applications. However, a trade-off exists between the speed and resolution of Nyquist rate current-steering DACs. As the resolution increases, more transistor area is required to meet matching requirements for optimal linearity and thus, the overall speed of the DAC is limited. In this… 

Machine Learning Based Image Calibration for a Twofold Time-Interleaved High Speed DAC

  • D. BeauchampK. Chugg
  • Computer Science
    2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)
  • 2019
TLDR
A novel image calibration algorithm for a twofold time-interleaved DAC (TIDAC) based on simulated annealing, which is often used in the field of machine learning to solve derivative-free optimization (DFO) problems.

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In this paper, a novel calibration method for high-accuracy current-steering DACs is presented. Different from traditional calibration methods which achieves the calibration by adjusting the current

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A 14-bit, 100-MS/s CMOS digital-to-analog converter (DAC) designed for spectral performance corresponding more closely to the 14-bit specification than current implementations is presented. This DAC

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TLDR
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