Corpus ID: 30456854

Design and Analysis of a Hardware CNN Accelerator

@inproceedings{Kiningham2017DesignAA,
  title={Design and Analysis of a Hardware CNN Accelerator},
  author={Kevin Kiningham},
  year={2017}
}
In recent years, Convolutional Neural Networks (CNNs) have revolutionized computer vision tasks. However, inference in current CNN designs is extremely computationally intensive. This has lead to an explosion of new accelerator architectures designed to reduce power consumption and latency [20]. In this paper, we design and implement a systolic array based architecture we call ConvAU to efficiently accelerate dense matrix multiplication operations in CNNs. We also train an 8-bit quantized… Expand
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6 Citations
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  • 2018 5th International Conference on Soft Computing & Machine Intelligence (ISCMI)
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PREMA: A Predictive Multi-Task Scheduling Algorithm For Preemptible Neural Processing Units
  • Yujeong Choi, Minsoo Rhu
  • Computer Science
  • 2020 IEEE International Symposium on High Performance Computer Architecture (HPCA)
  • 2020
TLDR
A case is made for a "preemptible" neural processing unit (NPU) and a "predictive" multi-task scheduler to meet the latency demands of high-priority inference while maintaining high throughput. Expand
DCNN for Tactile Sensory Data Classification based on Transfer Learning
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This framework demonstrates a method to achieve touch modality classification using pre-trained convolutional neural networks (CNNs) to address the challenging task of the recognition of the object that was touched by the E-Skin. Expand
Tesi di Laurea Design and implementation of a hardware accelerator for Deep Convolutional Neural Networks

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