Corpus ID: 212576364

Design Radix-4 64-Point Pipeline FFT/IFFT Processor for Wireless Application

  title={Design Radix-4 64-Point Pipeline FFT/IFFT Processor for Wireless Application},
  author={Kandhi Srikanth},
4G and other wireless systems are currently hot topics of research and development in the communication field. Broadband wireless systems based on orthogonal frequency division multiplexing (OFDM) often require an inverse fast Fourier transform (IFFT) to produce multiple sub-carriers. Fast Fourier transform (FFT) processing is one of the key procedures in popular orthogonal frequency division multiplexing (OFDM) communication systems. Our proposed design is aimed to Eliminate the read-only… Expand
Design of an FFT Processor using Mixed-Radix Algorithm for OFDM system
A parallel Fast Fourier Transform (FFT) processor for the use in Orthogonal Frequency Division Multiplexing (OFDM) is proposed here. The proposed processor is 64-point which is based on mixed radixExpand
Low Power 128 Point Split Radix FFT for LTE Application
A processor architecture customized to Split radix FFT algorithm that supports all FFT sizes, required by the LTE applications and applies various periodicity properties of twiddle factors multiplier is described. Expand
Bandwidth compressed waveform and system design for wireless and optical communications : theory and practice
  • T. Xu
  • Computer Science
  • 2017
This thesis addresses theoretical and practical challenges of spectrally efficient frequency division multiplexing (SEFDM) systems in both wireless and optical domains and presents solutions for these issues. Expand


A 64-point Fourier transform chip for high-speed wireless LAN application using OFDM
A novel fixed-point 16-bit word-width 64-point FFT/IFFT processor developed primarily for the application in an OFDM-based IEEE 802.11a wireless LAN baseband processor that can be used for any application that requires fast operation as well as low power consumption. Expand
Low-power variable-length fast Fourier transform processor
Fast Fourier transform (FFT) processing is one of the key procedures in the popular orthogonal frequency division multiplexing (OFDM) communication systems. Structured pipeline architectures and lowExpand
A Block Scaling FFT/IFFT Processor for WiMAX Applications
A novel block scaling method and a new ping-pong cache-memory architecture are proposed to reduce the power consumption and hardware cost and by proper scheduling of the two data streams, the proposed design achieves better hardware utilization. Expand
A low-power 64-point FFT/IFFT design for IEEE 802.11a WLAN application
A cost-effective and low-power 64-point fast Fourier transform (FFT)/inverse FFT (IFFT) architecture and chip adopting the retrenched 8-point FFT/IFFT (R8-FFT) unit and an efficient data-swapping method based output buffer unit is proposed. Expand
Designing pipeline FFT processor for OFDM (de)modulation
  • Shousheng He, M. Torkelson
  • Computer Science
  • 1998 URSI International Symposium on Signals, Systems, and Electronics. Conference Proceedings (Cat. No.98EX167)
  • 1998
By exploiting the spatial regularity of the new algorithm, the requirement for both dominant elements in VLSI implementation, the memory size and the number of complex multipliers, have been minimized and the area/power efficiency has been enhanced. Expand
A high-speed four-parallel radix-24 FFT/IFFT processor for UWB applications
A novel high-speed low- complexity four data-path 128-point radix-24 FFT/IFFT processor for high-throughput MB-OFDM UWB systems that has a throughput rate of up to 1.8 Gsample/s at 450 MHz while requiring much smaller hardware complexity. Expand
A 1-GS/s FFT/IFFT processor for UWB applications
In this paper, we present a novel 128-point FFT/IFFT processor for ultrawideband (UWB) systems. The proposed pipelined FFT architecture, called mixed-radix multipath delay feedback (MRMDF), canExpand
A novel low-power 64-point pipelined FFT/IFFT processor for OFDM applications
This paper presents a novel pipelined FFT/IFFT processor for OFDM applications. The proposed architecture employs a low-complexity complex multiplier and a constant complex multiplier to eliminateExpand
Energy-efficient 128∼2048/1536-point FFT processor with resource block mapping for 3GPP-LTE system
In this paper, we propose an energy-efficient 128∼2048/1536-point partial FFT processor for the resource block mapping in the 3GPP-LTE OFDMA system. First, we present a modified partial cached-FFTExpand
A new VLSI-oriented FFT algorithm and implementation
A new VLSI-oriented fast Fourier transform (FFT) algorithm-radix-2/4/8, which can effectively minimize the number of complex multiplications and is designed for use in the DVB application in 0.3 V triple-metal CMOS process. Expand