Design For At-Speed Structural Test And Performance Verification Of High-Performance ASICs

@article{Iyengar2006DesignFA,
  title={Design For At-Speed Structural Test And Performance Verification Of High-Performance ASICs},
  author={Vikram Iyengar and Mark Johnson and Theo Anemikos and Gary Grise and Mark Taylor and Raymond Farmer and Frank Woytowich and Bob Bassett},
  journal={IEEE Custom Integrated Circuits Conference 2006},
  year={2006},
  pages={567-570}
}
Performance verification is critical to high-performance ASICs manufacturing. Performance verification ensures that only those chips whose performance is higher than an advertised threshold are shipped to demanding customers. This provides a means to weed out nominal performance ASICs, and also ship ASICs at difference grades. At-speed structural test can provide performance verification capability at very low cost. In this paper, we present a scalable and flexible structural test method for… CONTINUE READING

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