Design, CAD and technology challenges for future processors: 3D perspectives

@article{Burns2011DesignCA,
  title={Design, CAD and technology challenges for future processors: 3D perspectives},
  author={Jeff Burns and Gary Carpenter and Eren Kursun and Ruchir Puri and James D. Warnock and Michael Scheuermann},
  journal={2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)},
  year={2011},
  pages={212-212}
}
Technology scaling has provided the semiconductor industry a recipe to successfully meet the application demands for performance for over three decades. This computational capacity was further fueled by the success of circuit and architecture-level innovation, which provided performance improvement in each processor generation. However, future processor designs face a number of key challenges in sustaining the growth trends. The dawn of the 22nm node, and beyond, marks an era of new trends and… CONTINUE READING