Density enhancement of a neural network using FPGAs and run-time reconfiguration

@article{Eldredge1994DensityEO,
  title={Density enhancement of a neural network using FPGAs and run-time reconfiguration},
  author={James G. Eldredge and Brad L. Hutchings},
  journal={Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines},
  year={1994},
  pages={180-188}
}
  • James G. Eldredge, Brad L. Hutchings
  • Published in
    Proceedings of IEEE Workshop…
    1994
  • Computer Science
  • Run-time reconfiguration is a way of more fully exploiting the flexbility of reconfigurable FPGAs. The run-time reconfiguration artificial neural network (RRANN) uses ran-time reconfiguration to increase the hardware density of FPGAs. The RRANN architecture also allows large amounts of parallelism to be used and is very scalable. RRANN divides the back-propagation algorithm into three sequential executed stages and configures the FPGAs to execute only one stage at a time. The FPGAs are… CONTINUE READING

    Create an AI-powered research feed to stay up to date with new papers like this posted to ArXiv

    Citations

    Publications citing this paper.
    SHOWING 1-10 OF 81 CITATIONS

    Using FPGAs to Implement Artificial Neural Networks

    VIEW 4 EXCERPTS
    CITES BACKGROUND & METHODS
    HIGHLY INFLUENCED

    Improving functional density using run-time circuit reconfiguration [FPGAs]

    VIEW 3 EXCERPTS
    CITES BACKGROUND & METHODS

    Artificial neural network model-based design and fixed-point FPGA implementation of hénon map chaotic system for brain research

    • Lei Zhang
    • Computer Science
    • 2017 IEEE XXIV International Conference on Electronics, Electrical Engineering and Computing (INTERCON)
    • 2017
    VIEW 1 EXCERPT
    CITES METHODS

    Deep Learning on FPGAs

    VIEW 1 EXCERPT

    Pseudo-constant logic optimization

    • Aaron Landy, Greg Stitt
    • Computer Science
    • 2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors
    • 2013
    VIEW 1 EXCERPT
    CITES BACKGROUND

    FILTER CITATIONS BY YEAR

    1994
    2017

    CITATION STATISTICS

    • 2 Highly Influenced Citations

    References

    Publications referenced by this paper.
    SHOWING 1-6 OF 6 REFERENCES

    FPGA Density Enhancement of a Neural Network Through Run-Time Reconfiguration

    • J . Eldredge
    • Masters Thesis, Dept. Electrical and Computer Engineering,
    • 1993

    Massively Parallel Computation of Back-Propagation Algorithm Using The Reconfigurable Machine

    • S. S. Erdogan, T. H. Hong
    • World Congress on Neural Networks
    • 1993

    A VLSI architecture for high-performance, low-cost, on-chip learning

    • Dan Hammerstrom
    • Computer Science
    • 1990 IJCNN International Joint Conference on Neural Networks
    • 1990