Demonstration of p-type In0.7Ga0.3As/GaAs0.35Sb0.65 and n-type GaAs0.4Sb0.6/In0.65Ga0.35As complimentary Heterojunction Vertical Tunnel FETs for ultra-low power logic

Extremely scaled high-k gate dielectrics with high quality electrical interfaces with arsenide (As) and antimonide (Sb) channels are used to demonstrate complimentary `all III-V' Heterojunction Vertical Tunnel FET (HVTFET) with record performance at |V<sub>DS</sub>|=0.5V. The p-type TFET (PTFET) has I<sub>ON</sub> =30μA/μm and I<sub>ON</sub>/I<sub>OFF</sub… CONTINUE READING

1 Figure or Table

Topics

Statistics

01020201620172018
Citations per Year

Citation Velocity: 8

Averaging 8 citations per year over the last 3 years.

Learn more about how we calculate this metric in our FAQ.