Delay-line based fast-locking all-digital pulsewidth-control circuit with programmable duty cycle

@article{Su2012DelaylineBF,
  title={Delay-line based fast-locking all-digital pulsewidth-control circuit with programmable duty cycle},
  author={Jun-Ren Su and Te-Wen Liao and Chung-Chih Hung},
  journal={2012 IEEE Asian Solid State Circuits Conference (A-SSCC)},
  year={2012},
  pages={305-308}
}
This paper proposes an all-digital fast-locking pulsewidth-control circuit with programmable duty-cycle. In comparison with prior art, our use of two delay lines and a time-to-digital detector allows the pulsewidth-control circuit to operate over a wide frequency range with fewer delay cells, while maintaining the same level of accuracy. This study presents a new duty-cycle setting circuit that calculates the desired output duty cycle without the need for a look-up table. Results show that the… CONTINUE READING