Corpus ID: 111110458

Delay Comparison of 4 by 4 Vedic Multiplier based on Different Adder Architectures using VHDL

@inproceedings{Sharma2013DelayCO,
  title={Delay Comparison of 4 by 4 Vedic Multiplier based on Different Adder Architectures using VHDL},
  author={Gaurav Sharma and Arjun V. Singh and H. Joshi and Satish Kumar Alaria},
  year={2013}
}
  • Gaurav Sharma, Arjun V. Singh, +1 author Satish Kumar Alaria
  • Published 2013
  • Mathematics
  • This paper presents a delay comparison of two different multipliers for unsigned data, one uses a ripple carry and the second one uses a carry-lookahead adder. The 4×4 Vedic multiplier module using Urdhva Tiryakbhyam Sutra uses four 2×2 Vedic multiplier modules. Urdhva tiryakbhyam Sutra is most powerful Sutra, giving minimum delay for multiplication of all types of numbers, either small or large. Urdhva Triyagbhyam– Vedic method for multiplication which strikes a difference in the real process… CONTINUE READING
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