Defect-Oriented Fault Simulation and Test Generation in Digital Circuits

  title={Defect-Oriented Fault Simulation and Test Generation in Digital Circuits},
  author={Wieslaw Kuzmicz and Witold A. Pleskacz and Jaan Raik and Raimund Ubar},
A generalized approach is presented to fault simulation and test generation based on a uniform functional fault model for different system representation levels. The fault model allows to represent the defects in components and defects in the communication network of components by the same technique. Physical defects are modeled as parameters in generalized differential equations. Solutions of these equations give the conditions at which defects are locally activated. The defect activation… CONTINUE READING
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