Decreasing Test Qualification Time in AMS and RF Systems

@article{Joannon2008DecreasingTQ,
  title={Decreasing Test Qualification Time in AMS and RF Systems},
  author={Yves Joannon and Vincent Beroulle and Chantal Robach and Smail Tedjini and Jean-Louis Carbon{\'e}ro},
  journal={IEEE Design & Test of Computers},
  year={2008},
  volume={25}
}
The authors of this article illustrate a means to use design models and simulation testbenches to decrease manufacturing test costs. This technique enables test cost optimization early in the RFIC design phase. In this article, we propose a test set optimization and qualification method that targets test application time, cost, and quality while also decreasing the generation time of production tests. Our approach decreases the manufacturing test cost of AMS and RF SoCs by automatically… CONTINUE READING

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