Decimal multiplier on FPGA using embedded binary multipliers

@article{Neto2008DecimalMO,
  title={Decimal multiplier on FPGA using embedded binary multipliers},
  author={Hor{\'a}cio C. Neto and M{\'a}rio P. V{\'e}stias},
  journal={2008 International Conference on Field Programmable Logic and Applications},
  year={2008},
  pages={197-202}
}
Decimal arithmetic has become a major necessity in computer arithmetic operations associated with human-centric applications, like financial and commercial, because the results must match exactly those obtained by human calculations. The relevance of decimal arithmetic has become evident with the revision of the IEEE-754 standard to include decimal floating-point support. There are already a variety of IP cores available for implementing binary arithmetic accelerators in FPGAs. Thus far… CONTINUE READING

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