Decimal floating-point: algorism for computers

@article{Cowlishaw2003DecimalFA,
  title={Decimal floating-point: algorism for computers},
  author={M. Cowlishaw},
  journal={Proceedings 2003 16th IEEE Symposium on Computer Arithmetic},
  year={2003},
  pages={104-111}
}
  • M. Cowlishaw
  • Published 2003
  • Computer Science
  • Proceedings 2003 16th IEEE Symposium on Computer Arithmetic
Decimal arithmetic is the norm in human calculations, and human centric applications must use a decimal floating point arithmetic to achieve the same results. Initial benchmarks indicate that some applications spend 50% to 90% of their time in decimal processing, because software decimal arithmetic suffers a 100/spl times/ to 1000/spl times/ performance penalty over hardware. The need for decimal floating point in hardware is urgent. Existing designs, however, either fail to conform to modern… Expand
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References

SHOWING 1-10 OF 67 REFERENCES
A decimal floating-point specification
  • 55
  • PDF
Applications of Redundant Number Representations to Decimal Arithmetic
  • 7
  • PDF
Desirable floating-point arithmetic and elementary functions for numerical computation
  • T. E. Hull
  • Computer Science
  • 1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)
  • 1978
  • 8
  • Highly Influential
  • PDF
CADAC: A Controlled-Precision Decimal Arithmetic Unit
  • 59
Compatible number representations
  • R. A. Keir
  • Mathematics, Computer Science
  • 1975 IEEE 3rd Symposium on Computer Arithmetic (ARITH)
  • 1975
  • 4
  • Highly Influential
A unified decimal floating-point architecture for the support of high-level languages
  • F. Ris
  • Computer Science
  • SGNM
  • 1976
  • 9
Toward an ideal computer arithmetic
  • T. E. Hull, M. Cohen
  • Computer Science
  • 1987 IEEE 8th Symposium on Computer Arithmetic (ARITH)
  • 1987
  • 10
Storage-efficient representation of decimal data
  • 30
Decimal shifting for an exact floating point representation
  • 10
EASIAC, A Pseudo-Computer
  • 4
...
1
2
3
4
5
...