Decimal counter based on redundancy-restraining technique

@article{Lili2011DecimalCB,
  title={Decimal counter based on redundancy-restraining technique},
  author={Zhao Li-li and Jia Mo-yi and Yan Xiao-dong},
  journal={2011 International Conference on Electric Information and Control Engineering},
  year={2011},
  pages={5787-5790}
}
In order to reduce the power dissipation correlative with redundant states in sequential circuits and the redundant leap of the lock, low power design of decimal counter is proposed in this paper. PSPICE simulation shows the design has correct logic function and low power dissipation.