DSPs, BRAMs, and a Pinch of Logic: Extended Recipes for AES on FPGAs

@article{Drimer2010DSPsBA,
  title={DSPs, BRAMs, and a Pinch of Logic: Extended Recipes for AES on FPGAs},
  author={Saar Drimer and Tim G{\"u}neysu and Christof Paar},
  journal={TRETS},
  year={2010},
  volume={3},
  pages={3:1-3:27}
}
We present three lookup-table-based AES implementations that efficiently use the BlockRAM and DSP units embedded within Xilinx Virtex-5 FPGAs. An iterative module outputs a 32-bit AES round column every clock cycle, with a throughput of 1.67 Gbit/s when processing two 128-bit inputs. This construct is then replicated four times to provide a complete AES round per cycle with 6.7 Gbit/s throughput when processing eight input streams. This, in turn, is replicated ten times for a fully unrolled… CONTINUE READING
Highly Cited
This paper has 46 citations. REVIEW CITATIONS

Citations

Publications citing this paper.
Showing 1-10 of 21 extracted citations

References

Publications referenced by this paper.
Showing 1-10 of 14 references

UG191: Virtex-5 FPGA configuration user guide

  • XILINX INC.
  • http://www.xilinx.com/support/documentation/user…
  • 2009
Highly Influential
8 Excerpts

UG440: Xilinx power estimator user guide

  • XILINX INC.
  • http://www.xilinx.com/support/documentation/user…
  • 2009
Highly Influential
8 Excerpts

UG193: Virtex-5 XtremeDSP design considerations user guide

  • XILINX INC.
  • http://www.xilinx.com/support/documentation/user…
  • 2007
Highly Influential
6 Excerpts

UG190: Virtex-5 user guide

  • XILINX INC.
  • http://www.xilinx.com/support/documentation/user…
  • 2006
Highly Influential
6 Excerpts

FIPS 197: Advanced Encryption Standard

  • NIST
  • NIST.
  • 2001
Highly Influential
7 Excerpts

Special Publication 800-38A: Recommendation for Block Cipher Modes of Operation: Methods and Techniques

  • M. DWORKIN
  • NIST.
  • 2001
Highly Influential
3 Excerpts

Similar Papers

Loading similar papers…