DSP architecture for cochlear implants

  title={DSP architecture for cochlear implants},
  author={Eric D. Marsman and Robert M. Senger and Gordy A. Carichner and Sundus Kubba and Michael S. McCorquodale and Richard B. Brown},
  journal={2006 IEEE International Symposium on Circuits and Systems},
  pages={4 pp.-}
This paper describes low-power DSP architecture for use in cochlear implants. The microsystem, fabricated in TSMC 0.18mum CMOS, consumes 1.79mW from a 1.2V supply and occupies an area of 9.18mm2 while providing the necessary programmability for high speech comprehension by patients. Standby power consumption is 330muW 

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