DFT and Probabilistic Testability Analysis at RTL

@article{Fernandes2006DFTAP,
  title={DFT and Probabilistic Testability Analysis at RTL},
  author={Jos{\'e} M. Fernandes and Marcelino B. Santos and Arlindo L. Oliveira and Jo{\~a}o Paulo Cacho Teixeira},
  journal={2006 IEEE International High Level Design Validation and Test Workshop},
  year={2006},
  pages={41-47}
}
This work presents probabilistic methods for testability analysis at RTL and their use to guide DFT techniques like partial-scan and TPI. Controllability is analyzed using three different approaches, an exact one, an approximated one that ignores the correlation between state variables and a third that only takes into account correlations within pre-defined groups that are formed based on an originally proposed heuristic that uses RTL information. These controllability analysis methods are… CONTINUE READING
3 Citations
14 References
Similar Papers

Citations

Publications citing this paper.
Showing 1-3 of 3 extracted citations

References

Publications referenced by this paper.
Showing 1-10 of 14 references

Probabilistic and Simulation-Based Approaches to Off-line BIST of Sequential IP Cores

  • F. Guerreiro, J. M. Fernandes, M. B. Santos, A. L. Oliveira, I. M. Teixeira, J. P. Teixeira
  • Design & Diagnostics of Electronic Circuits…
  • 2005
1 Excerpt

Formal Approach to the Testability Analisys of RT Level Digital circuits

  • R. Ruzicka
  • PhD Thesis, VUT v Brne,
  • 2002
1 Excerpt

Similar Papers

Loading similar papers…