Corpus ID: 51991853

DESIGN OF 16-BIT MULTIPLIER USING MODIFIED GATE DIFFUSION INPUT LOGIC

@inproceedings{Kumar2017DESIGNO1,
  title={DESIGN OF 16-BIT MULTIPLIER USING MODIFIED GATE DIFFUSION INPUT LOGIC},
  author={G. V. Kumar and P. K. Reddy},
  year={2017}
}
  • G. V. Kumar, P. K. Reddy
  • Published 2017
  • Now a day the growth of the electronic market, VLSI industry has driven towards the very high integration density. While integration density on a chip increases, critical concerns arises regarding the size and power dissipation of the components on the chip. In the recent years, various effort has been made for reducing the area, power consumption of the components as well as for reducing the propagation delay of them, such as scaling and different topologies like pass transistor logic (PTL… CONTINUE READING

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