DEFCAM: A design and evaluation framework for defect-tolerant cache memories

  title={DEFCAM: A design and evaluation framework for defect-tolerant cache memories},
  author={Hyunjin Lee and Sangyeun Cho and Bruce R. Childers},
Advances in deep submicron technology call for a careful review of existing cache designs and design practices in terms of yield, area, and performance. This article presents a Design and Evaluation Framework for defect-tolerant Cache Memories (DEFCAM), which enables processor architects to consider yield, area, and performance together in a unified framework. Since there is a complex, changing trade-off among these metrics depending on the technology, the cache organization, and the yield… CONTINUE READING


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