DCG: deterministic clock-gating for low-power microprocessor design

@article{Li2004DCGDC,
  title={DCG: deterministic clock-gating for low-power microprocessor design},
  author={Hai Li and Swarup Bhunia and Yiran Chen and Kaushik Roy and T. N. Vijaykumar},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  year={2004},
  volume={12},
  pages={245-254}
}
With the scaling of technology and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs. Because clock power can be significant in high-performance processors, we propose a deterministic clock-gating (DCG) technique which effectively reduces clock power. DCG is based on the key observation that for many of the pipelined stages of a modern processor, the circuit block usage in the near future is known a few cycles… CONTINUE READING
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