Corpus ID: 61089850

D-12-69 1D-based 2D Gaussian Convolution Unit Based Hardware Accelerator for Gassian & DoG Pyramid Construction in SIFT

  title={D-12-69 1D-based 2D Gaussian Convolution Unit Based Hardware Accelerator for Gassian \& DoG Pyramid Construction in SIFT},
  author={Jingbang Qiu and Tianci Huang and Takeshi Ikenaga},
Arquitectura hardware para la detección de puntos de interés del SIFT
A design and implementation of an efficient hardware architecture based on FPGAs for the candidate keypoints detection stage of the SIFT algorithm and the main contribution of the proposed pipelined architecture is that while increasing the number of octaves to be processed, the amount of occupied area of the device remains almost constant. Expand
Fast-Gaussian SIFT and its hardware architecture for keypoint detection
  • L. Ke, Jun Wang, Xijun Zhao, Fan Liang
  • Computer Science
  • 2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
  • 2016
A Fast-Gaussian SIFT(FG-SIFT) is proposed, which reduces the computational complexity about 95% in GSS construction, and increases the accuracy of keypoint detection. Expand
FPGA-based detection of SIFT interest keypoints
The architecture presented in this paper is able to detect interest points in an image of 320 × 240 in 11 ms, which represents a speedup of 250 × with respect to a software implementation, and the evaluations and experiments to the architecture support this contribution. Expand
A FPGA-Based Dual-Pixel Processing Pipelined Hardware Accelerator for Feature Point Detection Part in SIFT
An FPGA-implementable hardware accelerator for feature point detection of SIFT by introducing dual-pixel processing and the 3-stage-interpolation pipelined architecture with use of dual-port DDR2 memory access to further improve process speed and keep high accuracy. Expand
An FPGA-Based Real-Time Hardware Accelerator for Orientation Calculation Part in SIFT
By introducing LUT-Based Square Root Computation and Shifting-Based Orientation Calculation with use of dual-port DDR2 memory access, this paper achieves to reach real-time process speed, meanwhile keeping high accuracy. Expand