Current-Mode Transceiver for Silicon Interposer Channel


An energy-efficient 3 Gb/s current-mode interface scheme is proposed for on-chip global interconnects and silicon interposer channels. The transceiver core consists of an open-drain transmitter with one-tap pre-emphasis and a current sense amplifier load as the receiver. The current sense amplifier load is formed by stacking a PMOS diode stage and a cross… (More)
DOI: 10.1109/JSSC.2014.2336213


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@article{Lee2014CurrentModeTF, title={Current-Mode Transceiver for Silicon Interposer Channel}, author={Seung-Hun Lee and Seon-Kyoo Lee and Byungsub Kim and Hong-June Park and Jae-Yoon Sim}, journal={IEEE Journal of Solid-State Circuits}, year={2014}, volume={49}, pages={2044-2053} }