Cross-Layer Modeling and Simulation of Circuit Reliability

  title={Cross-Layer Modeling and Simulation of Circuit Reliability},
  author={Yu Cao and Jyothi Velamala and Ketul Sutaria and Mike Shuo-Wei Chen and Jonathan Ahlbin and Ivan Sanchez Esqueda and Michael Bajura and Michael Fritze},
  journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
Integrated circuit design in the late CMOS era is challenged by the ever-increasing variability and reliability issues. The situation is further compounded by real-time uncertainties in workload and ambient conditions, which dynamically influence the degradation rate. To improve design predictability and guarantee system lifetime, accurate modeling, and simulation tools for reliability are essential to both digital and analog circuits. This paper presents cross-layer solutions for emerging… CONTINUE READING
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Compact modeling of statistical BTI under trapping/detrapping

  • J. B. Velamala, K. B. Sutaria, H. Shimuzu, H. Awano, T. Sato, G. Wirth
  • IEEE Trans. Electron. Devices, vol. 60, no. 11…
  • 2013
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