Coverage of a microarchitecture-level fault check regimen in a superscalar processor

@article{Reddy2008CoverageOA,
  title={Coverage of a microarchitecture-level fault check regimen in a superscalar processor},
  author={Vimal K. Reddy and Eric Rotenberg},
  journal={2008 IEEE International Conference on Dependable Systems and Networks With FTCS and DCC (DSN)},
  year={2008},
  pages={1-10}
}
Conventional processor fault tolerance based on time/space redundancy is robust but prohibitively expensive for commodity processors. This paper explores an unconventional approach to designing a cost-effective fault-tolerant superscalar processor. The idea is to engage a regimen of microarchitecture-level fault checks. A few simple microarchitecture-level fault checks can detect many arbitrary faults in large units, by observing microarchitecture-level behavior and anomalies in this behavior… CONTINUE READING

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