Corrections to Chen and Chiu's Fault Tolerant Routing Algorithm for Mesh Networks

@article{Holsmark2007CorrectionsTC,
  title={Corrections to Chen and Chiu's Fault Tolerant Routing Algorithm for Mesh Networks},
  author={Rickard Holsmark and Shashi Kumar},
  journal={J. Inf. Sci. Eng.},
  year={2007},
  volume={23},
  pages={1649-1662}
}
Chen and Chiu published a fault tolerant routing algorithm for mesh topology net-works which they claimed was deadlock free in the presence of multiple faults. In this paper we give a counter-examp ... 

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References

Publications referenced by this paper.
SHOWING 1-8 OF 8 REFERENCES

A network on chip architecture and design methodology

  • Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002
  • 2002
VIEW 3 EXCERPTS
HIGHLY INFLUENTIAL

Fault-tolerant wormhole routing in meshes

  • FTCS-23 The Twenty-Third International Symposium on Fault-Tolerant Computing
  • 1993
VIEW 1 EXCERPT

The Turn Model for Adaptive Routing

  • [1992] Proceedings the 19th Annual International Symposium on Computer Architecture
  • 1992
VIEW 1 EXCERPT

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