# Conventional versus Vedic Mathematical Method for Hardware Implementation of a Multiplier

@article{Mehta2009ConventionalVV, title={Conventional versus Vedic Mathematical Method for Hardware Implementation of a Multiplier}, author={Parth Mehta and Dhanashri H. Gawali}, journal={2009 International Conference on Advances in Computing, Control, and Telecommunication Technologies}, year={2009}, pages={640-642} }

Aim of this paper is to compare and prove implementation of normal multiplication and Vedic multiplication (using Urdhva Tiryakbhyam Sutra) on digital hardware requires same number of multiplication and addition operations.It makes difference only for mental calculations. Few VHDL codes has been developed for this. All multipliers has been tested for 16X16 multiplications for comparison. Test vectors has been given through a text file. Implementation has been done for the Xilinx FPGA device… Expand

#### 151 Citations

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