Constraint driven I/O planning and placement for chip-package co-design

@article{Xiong2006ConstraintDI,
  title={Constraint driven I/O planning and placement for chip-package co-design},
  author={Jinjun Xiong and Yiu-Chung Wong and Egino Sarto and Lei He},
  journal={Asia and South Pacific Conference on Design Automation, 2006.},
  year={2006},
  pages={6 pp.-}
}
System-on-chip and system-in-package result in increased number of I/O cells and complicated constraints for both chip designs and package designs. This renders the traditional manually tuned and chip-centered I/O designs suboptimal in terms of both turn around time and design quality. In this paper we formally introduce a set of design constraints suitable for chip-package co-design. We formulate a constraint-driven I/O planning and placement problem, and solve it by a multi-step algorithm… CONTINUE READING

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