Congestion estimation during top-down placement

@inproceedings{Yang2001CongestionED,
  title={Congestion estimation during top-down placement},
  author={Xiaojian Yang and R. Kastner and M. Sarrafzadeh},
  booktitle={ISPD '01},
  year={2001}
}
Congestion is one of the fundamental issues in VLSI physical design. In this paper, we propose two congestion estimation approaches for early placement stages. First, we theoretically analyze the peak congestion value of the design and experimentally validate the estimation approach. Second, we estimate regional congestion in the early top-down placement. This is done by combining the wirelength distribution model and inter-region wire estimation. Both approaches are based on the well known… Expand
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References

SHOWING 1-10 OF 37 REFERENCES
Multi-center congestion estimation and minimization during placement
TLDR
A mathematical equation to predict the overflow within a region using a normal distribution approximation is given and it is shown that this equation does give a good estimation of overflow. Expand
On the behavior of congestion minimization during placement
TLDR
The notion of consistent routing model is introduced and promote its adoption by placement systems and it is shown that in this model the wirelength objective is indeed a good measure of congestion by establishing that a placement with minimum wirelength has minimum total congestion. Expand
RISA: accurate and efficient placement routability modeling
TLDR
An accurate and efficient placement routability modeling technique is proposed and incorporated into the prevailing simulated annealing approach based on the supply versus demand analysis of routing resource over an array of regions on a chip. Expand
Can recursive bisection alone produce routable, placements?
TLDR
The state-of-the-art after two decades of research in recursive bisection placement is summarized and a new placer is implemented, called Capo, to empirically study the achievable limits of the approach and validates fixed-die placement results by violation-free detailed auto-routability. Expand
Dragon2000: standard-cell placement tool for large industry circuits
  • Maogang Wang, Xiaojian Yang, M. Sarrafzadeh
  • Engineering, Computer Science
  • IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140)
  • 2000
TLDR
It is argued that net-cut minimization is a good and important shortcut to solve the large scale placement problem and is shown to be more important than greedily obtain a wirelength optimal placement at intermediate hierarchical levels. Expand
Accurate Interconnection Length Estimations for Predictions Early in the Design Cycle
TLDR
It is shown that a significantly more accurate estimate is obtained by taking into account the inherent features of the optimal placement process, which is not sufficiently accurate for some applications. Expand
Wirelength estimation based on rent exponents of partitioning and placement
TLDR
Experiments on large circuits show that for wirelength estimation, the Rent exponent extracted from placement is more reasonable than that from partitioning. Expand
On the intrinsic rent parameter and spectra-based partitioning methodologies
TLDR
Experimental results show that spectra-based ratio cut partitioning algorithms yield partitioning trees with the lowest observed Rent parameter over all benchmarks and over all algorithms tested, and have deep implications with respect to both the choice of partitioning algorithm for top-down layout, as well as new approaches to layout area estimation. Expand
Why interconnect prediction doesn't work
TLDR
This paper examines some fundamental problems with interconnect estimation, and concludes that industrial practice will continue to rely on trial implementations rather than interconnect prediction. Expand
Congestion driven quadratic placement
TLDR
This paper introduces and demonstrates an extension to quadratic placement that accounts for wiring congestion, using an A* router and line-probe heuristics on region-based routing graphs to compute routing cost and shows improvements in wireability. Expand
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