Configurable VLSI Architecture for Deblocking Filter in H.264/AVC

@article{Chen2008ConfigurableVA,
  title={Configurable VLSI Architecture for Deblocking Filter in H.264/AVC},
  author={Chung-Ming Chen and Chung-Ho Chen},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  year={2008},
  volume={16},
  pages={1072-1082}
}
In this paper, we study and analyze the computational complexity of the deblocking filter in H.264/AVC baseline decoder based on SimpleScalar/ARM simulator. The simulation result shows that the memory reference, content activity check operations, and filter operations are known to be very time consuming in the decoder of this new video coding standard. In order to improve overall system performance, we propose a configurable, extensible, and synthesizable window-based processing architecture… CONTINUE READING