Conditional-Sum Addition Logic

@article{Sklansky1960ConditionalSumAL,
  title={Conditional-Sum Addition Logic},
  author={Jack Sklansky},
  journal={IRE Trans. Electronic Computers},
  year={1960},
  volume={9},
  pages={226-231}
}
Conditional-sum addition is a new mechanism for parallel, high-speed addition of digitally-represented numbers. Its design is based on the computation of ``conditional'' sums and carries that result from the assumption of all the possible distributions of carries for various groups of columns. A rapid-sequence mode of operation provides an addition rate that is invariant with the lengths of the summands. Another advantage is the possibility of realizing the adder with ``integrated devices'' or… CONTINUE READING

Topics from this paper.

Citations

Publications citing this paper.
SHOWING 1-10 OF 265 CITATIONS

FILTER CITATIONS BY YEAR

1965
2019

CITATION STATISTICS

  • 37 Highly Influenced Citations

  • Averaged 8 Citations per year from 2017 through 2019