• Corpus ID: 37640785

Compressor Based Area-Efficient Low-Power 8 x 8 Vedic Multiplier

  title={Compressor Based Area-Efficient Low-Power 8 x 8 Vedic Multiplier},
  author={Nidhi Pokhriyal and Harsimranjit Kaur and Neelam Rup Prakash},
Multipliers are the integral components in the design of many high performance FIR filters, image and digital signal processors. Multipliers being the most area and power consuming elements of a design, area-efficient low-power multiplier architectures are in demand. In this paper, multiplier based on ancient Vedic mathematics technique has been proposed which employs 4:3, 5:3, 6:3 and 7:3 compressors for addition of partial products. Combining the Vedic SutraUrdhwa Tiryakbhyam and efficient… 

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