Compiler-assisted leakage energy optimization for clustered VLIW architectures

  title={Compiler-assisted leakage energy optimization for clustered VLIW architectures},
  author={Rahul Nagpal and Y. N. Srikant},
Miniaturization of devices and the ensuing decrease in the threshold voltage has led to a substantial increase in the leakage component of the total processor energy consumption. Relatively simpler issue logic and the presence of a large number of function units in the VLIW and the clustered VLIW architectures attribute a large fraction of this leakage energy consumption in the functional units. However, functional units are not fully utilized in the VLIW architectures because of the inherent… CONTINUE READING
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