Compiler-Based Data Prefetching and Streaming Non-temporal Store Generation for the Intel(R) Xeon Phi(TM) Coprocessor

@article{Krishnaiyer2013CompilerBasedDP,
  title={Compiler-Based Data Prefetching and Streaming Non-temporal Store Generation for the Intel(R) Xeon Phi(TM) Coprocessor},
  author={Rakesh Krishnaiyer and Emre Kultursay and Pankaj Chawla and Serguei Preis and Anatoly Zvezdin and Hideki Saito},
  journal={2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum},
  year={2013},
  pages={1575-1586}
}
The Intel® Xeon Phi™ coprocessor has software prefetching instructions to hide memory latencies and special store instructions to save bandwidth on streaming non-temporal store operations. In this work, we provide details on compiler-based generation of these instructions and evaluate their impact on the performance of the Intel® Xeon Phi™ coprocessor using a wide range of parallel applications with different characteristics. Our results show that the Intel® Composer XE 2013 compiler can make… CONTINUE READING

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