Comparison of Three Single-Phase PLL Algorithms for UPS Applications


In this paper, the performance assessment of three software single-phase phase-locked loop (PLL) algorithms is carried out by means of dynamic analysis and experimental results. Several line disturbances such as phase-angle jump, voltage sag, frequency step, and harmonics are generated by a DSP together with a D/A converter and applied to each PLL. The actual minus the estimated phase-angle values are displayed, providing a refined method for performance evaluation and comparison. Guidelines for parameters adjustments are also presented. In addition, practical implementation issues such as computational delay effects, ride-through, and computational load are addressed. The developed models proved to accurately represent the PLLs under real test conditions.

DOI: 10.1109/TIE.2008.924205

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@article{Filho2008ComparisonOT, title={Comparison of Three Single-Phase PLL Algorithms for UPS Applications}, author={Rubens M. Santos Filho and Paulo F. Seixas and Porf{\'i}rio C. Cortizo and Leonardo Ant{\^o}nio Borges Torres and Andr{\'e} F. Souza}, journal={IEEE Trans. Industrial Electronics}, year={2008}, volume={55}, pages={2923-2932} }