Comparing simulation techniques for microarchitecture-aware floorplanning

Abstract

Due to the long simulation times of the reference input sets, microarchitects resort to alternative techniques to speed up cycle-accurate simulations. However, the reduction in the runtimes comes with an associated loss of accuracy in replicating the characteristics of the reference sets. In addition, the effect of these inaccuracies on the overall… (More)
DOI: 10.1109/ISPASS.2006.1620792

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Cite this paper

@article{Nookala2006ComparingST, title={Comparing simulation techniques for microarchitecture-aware floorplanning}, author={Vidyasagar Nookala and Ying Chen and David J. Lilja and Sachin S. Sapatnekar}, journal={2006 IEEE International Symposium on Performance Analysis of Systems and Software}, year={2006}, pages={80-88} }