Comparing cache architectures and coherency protocols on x86-64 multicore SMP systems

@article{Hackenberg2009ComparingCA,
  title={Comparing cache architectures and coherency protocols on x86-64 multicore SMP systems},
  author={Daniel Hackenberg and Daniel Molka and Wolfgang E. Nagel},
  journal={2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)},
  year={2009},
  pages={413-422}
}
Across a broad range of applications, multicore technology is the most important factor that drives today's microprocessor performance improvements. Closely coupled is a growing complexity of the memory subsystems with several cache levels that need to be exploited efficiently to gain optimal application performance. Many important implementation details of these memory subsystems are undocumented. We therefore present a set of sophisticated benchmarks for latency and bandwidth measurements to… 
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