Comparing Hardware Performance of Fourteen Round Two SHA-3 Candidates Using FPGAs

@inproceedings{Homsirikamol2010ComparingHP,
  title={Comparing Hardware Performance of Fourteen Round Two SHA-3 Candidates Using FPGAs},
  author={Ekawat Homsirikamol and Marcin Rogawski and Kris Gaj},
  booktitle={IACR Cryptology ePrint Archive},
  year={2010}
}
Performance in hardware has been demonstrated to be an important factor in the evaluation of candidates for cryptographic standards. Up to now, no consensus exists on how such an evaluation should be performed in order to make it fair, transparent, practical, and acceptable for the majority of the cryptographic community. In this report, we formulate a proposal for a fair and comprehensive evaluation methodology, and apply it to the comparison of hardware performance of 14 Round 2 SHA-3… CONTINUE READING
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B. Baldwin, N. Hanley, +4 authors W. P. Marnane
Second SHA-3 Candidate Conference, Aug. 2010. http://csrc.nist.gov/groups/ST/hash/sha-3/ Round2/Aug2010/documents/papers/BALDWIN_FPGA_SHA3.pdf. • 2010
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Fair and comprehensive methodology for comparing hardware performance of fourteen round two SHA-3 candidates using FPGAs

K. Gaj, E. Homsirikamol, M. Rogawski
Cryptographic Hardware and Embedded Systems - CHES 2010, vol. 6225 of LNCS, pp. 264–278, Springer, Aug. 2010. • 2010
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How can we conduct “fair and consistent” hardware evaluation for SHA-3 candidate

S. Matsuo, M. Knezevic, +4 authors K. Ota
Second SHA-3 Candidate Conference, Aug. 2010. http://csrc.nist.gov/groups/ST/hash/sha-3/Round2/Aug2010/documents/ papers/MATSUO_SHA-3_Criteria_Hardware_revised.pdf. • 2010
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