Comparing Data Forwarding and Prefetching for Communication-induced Misses in Shared-memory MPs

Abstract

As the difference in speed between processor and memory system continues to increase, it is becoming crucial to develop and refine techniques that enhance the effectiveness of cache hierarchies. Two such techniques are data prefetching and data forwarding. With prefetching, a processor hides the latency of cache misses by requesting the data before it… (More)
DOI: 10.1145/277830.277847

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