Comparator Design and Analysis for Comparator-Based Switched-Capacitor Circuits

  title={Comparator Design and Analysis for Comparator-Based Switched-Capacitor Circuits},
  author={Todd Sepke},
The design of high gain, wide dynamic range op-amps for switched-capacitor circuits has become increasingly challenging with the migration of designs to scaled CMOS technologies. The reduced power supply voltages and the low intrinsic device gain in scaled technologies offset some of the benefits of the reduced device parasitics. An alternative comparator-based switched-capacitor circuit (CBSC) technique that eliminates the need for high gain op-amps in the signal path is proposed. The CBSC… CONTINUE READING
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A 100-MHz pipelined CMOS comparator

  • J.-T. Wu, B. A. Wooley
  • IEEE Journal of Solid-State Circuits, vol. 23, no…
  • 1988
Highly Influential
3 Excerpts

Analysis of low-frequency noise reduction by autozero technique

  • C. Enz
  • Electronics Letters, vol. 20, no. 23, pp. 959-960…
  • 1984
Highly Influential
4 Excerpts

A comparator-based switched capacitors pipelined analog-todigital converter

  • J. K. Fiorenza
  • Ph.D. dissertation, Massachusetts Institute of…
  • 2006
2 Excerpts

Comparatorbased switched-capacitor circuits for scaled CMOS technologies

  • T. Sepke, J. K. Fiorenza, C. G. Sodini, P. Holloway, H.-S. Lee
  • IEEE International Solid-State Circuits…
  • 2006
2 Excerpts

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