# Combinational logic synthesis for material implication

@article{Chattopadhyay2011CombinationalLS, title={Combinational logic synthesis for material implication}, author={Anupam Chattopadhyay and Zolt{\'a}n Endre R{\'a}kossy}, journal={2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip}, year={2011}, pages={200-203} }

The smooth scaling of technology over past decades is returning diminished profits as researchers are trying to cope with several challenges posed by CMOS devices. As a result, quest for novel physical media for storage and computing is currently an important research pursuit. Recently a new kind of passive electrical device called memristor is proposed, which can retain its state via the resistance in a non-volatile fashion. It is also experimentally demonstrated to perform material… Expand

#### 22 Citations

Architectures and automation for beyond-CMOS technologies

- Computer Science
- 2018

A polynomial-time delay-optimal mapping algorithm for technology mapping using memristors, and a synthesis algorithm to map a logic network to single target gates, using reversible pebble game to reduce number of qubits. Expand

An Improved Approach for the Synthesis of Boolean Functions Using Memristor Based IMPLY and INVERSE-IMPLY Gates

- Computer Science
- 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
- 2016

The widely available synthesis tool ABC is used for synthesizing an arbitrary boolean function into a netlist of IMPLY gates, and an INVERSE-IMPLY gate is proposed for handling fanouts in the intermediate netlist generated by the ABC tool. Expand

Review Paper on Memristor MOS Content Addressable Memory

- 2014

The ongoing development of networks such as internet also takes about the need for being able to design new component or circuits that are able to exist together with CMOS process technology as CMOS… Expand

Beyond von Neumann--logic operations in passive crossbar arrays alongside memory operations.

- Materials Science, Medicine
- Nanotechnology
- 2012

It is demonstrated here that 14 of 16 Boolean functions can be realized with a single BRS or CRS cell in at most three sequential cycles, making logic-in-memory applications feasible. Expand

Simple magic: Synthesis and in-memory Mapping of logic execution for memristor-aided logic

- Computer Science
- 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
- 2017

The development of SIMPLE is developed, a framework that optimizes the execution of an arbitrary logic function, while considering all the constraints involved in performing it within a memristive memory, to overcome the memory-CPU bottleneck. Expand

A Complementary Resistive Switch-Based Crossbar Array Adder

- Computer Science
- IEEE Journal on Emerging and Selected Topics in Circuits and Systems
- 2015

This paper introduces two multi-bit adder schemes using the CRS-based logic-in-memory approach, and proves the concepts by means of SPICE simulations using a dynamical memristive device model of a ReRAM cell. Expand

Perspectives on Emerging Computation-in-Memory Paradigms

- Computer Science
- 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)
- 2021

This work introduces ReRAMs in terms of their novel computing paradigms and present ReRAM-specific design flows and addresses the various circuit opportunities and challenges related to reliability and fault tolerance associated with them. Expand

SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars

- Computer Science
- 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)
- 2019

A novel library-free supergate-aided (SAID) logic synthesis approach with a dedicated mapping strategy tailored on MAGIC crossbars, capable to outperform other state-of-the-art techniques in terms of speedup and relax mapping constraints, allowing an easy and fast mapping of Boolean functions on memristive crossbars. Expand

Logic Synthesis for Hybrid CMOS-ReRAM Sequential Circuits

- Computer Science
- 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
- 2019

An algorithm to efficiently divide the target function into two independent computational parts allows to merge part of the computation within a ReRAM unit and utilize its computational capabilities besides its function as a sequential element in order to minimize the CMOS overhead. Expand

Logic Synthesis for Majority Based In-Memory Computing

- Computer Science
- 2017

In this chapter, the memristive behavior of RRAM is abstracted as a majority based logic operation for efficient synthesis of logic-in-memory circuits and systems. Expand

#### References

SHOWING 1-10 OF 13 REFERENCES

‘Memristive’ switches enable ‘stateful’ logic operations via material implication

- Physics, Computer Science
- Nature
- 2010

Bipolar voltage-actuated switches, a family of nonlinear dynamical memory devices, can execute material implication (IMP), which is a fundamental Boolean logic operation on two variables p and q such that pIMPq is equivalent to (NOTp)ORq. Expand

Complementary resistive switches for passive nanocrossbar memories.

- Computer Science, Medicine
- Nature materials
- 2010

A complementary resistive switch is introduced that consists of two antiserial memristive elements and allows for the construction of large passive crossbar arrays by solving the sneak path problem in combination with a drastic reduction of the power consumption. Expand

Stateful implication logic with memristors

- Computer Science
- 2009 IEEE/ACM International Symposium on Nanoscale Architectures
- 2009

This paper describes an effective way to compute any Boolean function with a small number of memristors, and the length of the corresponding computing sequence is considered. Expand

Memristor-CMOS hybrid integrated circuits for reconfigurable logic.

- Computer Science, Medicine
- Nano letters
- 2009

Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint… Expand

A Defect-Tolerant Architecture for Nanoelectronic Resistive Memories

- Computer Science
- 2006 7th Annual Non-Volatile Memory Technology Symposium
- 2006

The results indicate that the memories with a CMOS/nano pitch ratio close to 3, may overcome the usual resistive and flash memories with the same CMOS design rules in useful bit density if the fraction of bad nanodevices is below ~ 15%, even under rather tough (30 ns) restrictions on the total access time. Expand

Memristive switching mechanism for metal/oxide/metal nanodevices.

- Materials Science, Medicine
- Nature nanotechnology
- 2008

Experimental evidence is provided to support this general model of memristive electrical switching in oxide systems, and micro- and nanoscale TiO2 junction devices with platinum electrodes that exhibit fast bipolar nonvolatile switching are built. Expand

A Fundamental Analysis of Nano-Crossbars with Non-Linear Switching Materials and its Impact on TiO2 as a Resistive Layer

- Materials Science
- 2008 8th IEEE Conference on Nanotechnology
- 2008

While materials with a linear IV-characteristic yield in a practically unusable voltage swing when used in crossbar arrays, materials with a nonlinear IV-curve were expected to yield better results.… Expand

Timing optimization of combinational logic

- Mathematics, Computer Science
- [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers
- 1988

An algorithm for speeding up combinational logic with minimal area increase is presented, using a static timing analyzer and a weighted min-cut algorithm to determine the subset of nodes to be resynthesized. Expand

DAG-aware AIG rewriting: a fresh look at combinational logic synthesis

- Computer Science
- 2006 43rd ACM/IEEE Design Automation Conference
- 2006

Experiments on large industrial benchmarks show that the proposed methodology scales to very large designs and is several orders of magnitude faster than SIS and MVSIS while offering comparable or better quality when measured by the quality of the network after mapping. Expand

Timing-driven logic bi-decomposition

- Computer Science
- IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
- 2003

An approach for logic decomposition that produces circuits with reduced logic depth is presented, a technology-independent approach that enables one to find tree-like expressions with smaller depths than the ones obtained by state-of-the-art techniques. Expand