Clock mesh synthesis with gated local trees and activity driven register clustering

@article{Lu2012ClockMS,
  title={Clock mesh synthesis with gated local trees and activity driven register clustering},
  author={Jianchao Lu and Xiaomi Mao and Baris Taskin},
  journal={2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)},
  year={2012},
  pages={691-697}
}
A clock mesh network synthesis method is proposed which enables clock gating on the local sub-trees in order to reduce the clock power dissipation. Clock gating is performed with a register clustering strategy that considers both i) the similarity of switching activities between registers in a local area and ii) the timing slack on every local data path in the design. This is the first work known in literature that encapsulates the efficient implementation of the gated local trees and activity… CONTINUE READING
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